Non-Uniform ACC Circuit Lower Bounds
2011 IEEE 26th Annual Conference on Computational Complexity, 2011 · paper · Computer science
Proves that nondeterministic exponential time lacks polynomial-size non-uniform ACC circuits, and that E^NP lacks ACC circuits of size 2^(n^o(1)). The approach designs faster satisfiability algorithms for ACC circuits and shows these imply the lower bounds.
Checked: PDF from cs.cmu.edu, fetched 4 Oct 2026. Page numbers are those of that PDF.
3 findings
Reference or label The proof of Theorem 3.2 says "As discussed earlier (Lemma 2.1)", but the paper has no Lemma 2.1. The machine-model result in Section II is "Theorem 2.1 (Gurevich and Shelah [GS89])".
- p. 8 Proof of Theorem 3.2, second paragraph
As discussed earlier (Lemma 2.1),
- p. 3 Section II, Machine model
Theorem 2.1 (Gurevich and Shelah [GS89])
- p. 3 Section II, Machine model
Theorem 2.1 (Gurevich and Shelah [GS89]):
- p. 8 Proof of Theorem 3.2, first paragraph
As discussed earlier (Lemma 2.1)
Judge's note: Searched the whole text: the lemmas are numbered 3.1, 4.1, 4.2 and 5.1 only, and there is no Lemma 2.1. The page 3 image shows Theorem 2.1 together with the multitape TM vs RAM discussion that the sentence on page 8 relies on. The label points to the wrong item.
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Reference or label Reference [Ajt83] gives the page range as "Annals of Pure and Applied Logic 24:1–148, 1983."
- p. 10 References, [Ajt83]
Annals of Pure and Applied Logic 24:1–148, 1983.
Only the authors can say what is right here.
Judge's note: Rests on outside knowledge: that Ajtai's article in APAL 24 (1983) occupies pages 1–48. The page 10 image confirms the printed range is 1–148.
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Wording The proof of Theorem 1.2 takes ε from Theorem 4.1 for "depth-d ACC circuits", but applies it through Theorem 3.2 to SAT instances of "depth 2d + O(1)".
- p. 9 Proof of Theorem 1.2
is an ε > 0 so that satisfiability of depth-d ACC circuits with MODm gates, n inputs, and 2O(nε) size can be solved
- p. 9 Proof of Theorem 1.2
variables, depth 2d + O(1), and s = n 2O(nε) size can be solved in O(2n/nc) time
Only the authors can say what is right here.
Judge's note: Reworked from the page 9 image. In Theorem 4.1, ε depends on the depth: the proof needs ε small relative to e, which depends on the depth. Theorem 3.2 needs a SAT algorithm for circuits of depth 2d + O(1) and size n·2^{O(n^ε)}. The ε obtained for depth d is not shown to work for depth 2d + O(1), so the step does not follow as printed. Applying Theorem 4.1 at depth 2d + O(1) instead gives an ε that still depends only on d and m, so Theorem 1.2 stands.
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8 minor (typos and the like; most checked by the judge only)
Wording The introduction says earlier work needed "an o(2^{n/3}) time algorithm for ACC circuit satisfiability", but Theorem 3.1 requires O(2^{n/3}/s(n)) with s(n)=ω(n^k) for every k, and Section III says "a 2^{n/3}/n^{ω(1)} time algorithm ... is needed".
- p. 2 Section I.A, item 1
o(2n/3) time algorithm for ACC circuit satisfiability implies
- p. 5 Theorem 3.1
can be solved in O(2n/3/s(n)) time for every c
- p. 6 Section III, paragraph on [Wil10]
a 2n/3/nω(1) time algorithm for
- p. 2 Section I.A, item 1
which could only show that an o(2^{n/3}) time algorithm for ACC circuit satisfiability implies lower bounds [Wil10]
Only the authors can say what is right here.
Judge's note: Checked the page images. Page 2 (left column, item 1) says o(2^{n/3}). Page 5 (Theorem 3.1) requires O(2^{n/3}/s(n)) with s superpolynomial. Page 6 (right column) repeats 2^{n/3}/n^{ω(1)}. These are different hypotheses: o(2^{n/3}) is the weaker one. The introduction is an informal overview, but it states the earlier result's hypothesis differently from the paper's own formal statement of that result. Wording issue only; nothing in Section III depends on it.
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Wording The proof of Theorem 3.2 says A produces "an ACC circuit C′x of S(n + c log n) size and n + c log n inputs", while Lemma 3.1 states "n+d log n inputs, depth d′, and S(n + d log n) size".
- p. 8 Proof of Theorem 3.2, third paragraph
A produces an ACC circuit C′x of S(n + c log n) size and n + c log n inputs
- p. 6 Lemma 3.1 statement, second bullet
prints an ACC circuit C′x with n+d log n inputs, depth d′, and S(n + d log n) size
Judge's note: Pages 6 and 8 confirm the difference. Since c > 2d and S is monotone, the statement in the proof is a valid upper bound once the circuit is padded. The change from d to c is probably made because d means depth in Theorem 3.2, which is itself a clash of notation with the d of Lemma 3.1. This is a consistency point, not an error.
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Wording Proof of Lemma 3.1 (p.7, right column): "Since EQUIV(i) has n + d log n inputs, depth d′ + O(1), and size O(S(n + O(log n)))". EQUIV is defined to compare C′x(i) with E(x, i, kn^d + k), and the paper sizes E at "S(n + (n + d log n) + d log n + O(1)) ≤ S(3n)", so the size bound EQUIV inherits is O(S(3n)), not O(S(n + O(log n))).
- p. 7 Proof of Lemma 3.1, EQUIV paragraph
inputs, depth d′ + O(1), and size O(S(n + O(log n))), the
- p. 7 Proof of Lemma 3.1, definition of E
S(n + (n + d log n) + d log n + O(1)) ≤ S(3n)
- p. 7 Proof of Lemma 3.1, final paragraph defining EQUIV
size O(S(n + O(log n)))
- p. 7 Proof of Lemma 3.1, EQUIV step (right column, bottom)
Since EQUIV(i) has n + d log n inputs, depth d′ + O(1), and size O(S(n + O(log n)))
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Judge's note: I checked page 7 (extract/png/main-p007.png). Left column: E(x,i,j) is guessed as an ACC circuit "of size S(n + (n + d log n) + d log n + O(1)) ≤ S(3n) and depth d′". Right column: EQUIV(i) outputs 1 iff C′x(i) ≠ E(x,i,kn^d+k), so it contains both the guessed C′x (size S(n+d log n)) and a copy of E with x and j fixed. Fixing inputs does not bound the guessed E's size below its stated bound. Reworking the step: size(EQUIV) = O(S(n+d log n) + S(2n+2d log n+O(1))) = O(S(3n)). For a fast-growing admissible S (Theorem 3.2 allows S(n) ≤ 2^{n/4}, e.g. S(t)=2^{t/4}), S(2n)/S(n+O(log n)) tends to infinity, so the printed bound O(S(n+O(log n))) does not follow as printed. The stated lemma still holds: its hypothesis (p.6–7, Lemma 3.1) lets the SAT algorithm handle circuits of depth 2d′+O(1) and size O(S(3n)+S(2n)n), which covers EQUIV at depth d′+O(1) and size O(S(3n)). So the step is faulty but the result stands (S3). The five quoted locations are the same single defect.
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Wording Section IV introduces the evaluation method as "rapidly evaluating a given SYM+ circuit on all of its possible satisfying assignments", but Lemma 4.2 evaluates the circuit on all 2^n assignments.
- p. 8 Section IV.A, first paragraph
of its possible satisfying assignments:
- p. 8 Section IV.A intro
on all of its possible satisfying assignments
Judge's note: Page 8 (right column) shows the quoted wording. Lemma 4.2 itself, and the text after it, say the circuit is evaluated on all 2^n assignments and the full truth table is printed. Page 9 says "all of its possible assignments". The word 'satisfying' misdescribes what the lemma does.
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Wording Theorem 1.2 uses δ as the size exponent ("size 2^{n^δ}"), but its proof reuses δ for the time-savings exponent of Theorem 4.1 ("for some δ > ε") and concludes a lower bound for size 2^{n^ε}.
- p. 9 Reminder of Theorem 1.2
ACC circuits of depth d and size 2nδ with MODm gates
- p. 9 Proof of Theorem 1.2
in 2n−Ω(nδ) time, for some δ > ε
Judge's note: Page 9 shows that the proof concludes E^NP lacks depth-d ACC circuits of size 2^{n^ε}. This proves the theorem with its existential δ set to ε. Reusing δ with a different meaning (and δ > ε) makes it unclear what the proof establishes. Notation only; the result is unaffected.
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Typo Subject–verb disagreement: "Informally, this says that L ∈ NTIME[2^n] have 'succinct' reductions to exponentially long 3SAT instances."
- p. 2 Section I.A, paragraph 'Two known facts'
Informally, this says that L ∈ NTIME[2^n] have
Judge's note: The page 2 image (right column) shows the wording as quoted. The singular subject L takes the plural verb 'have'. Copy-editing slip.
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Typo The witness circuit is introduced as W_x, but in the same sentence it is written W: "there is an ACC circuit W_x ... such that the variable assignment z_i = W(i)". The same happens on page 9.
- p. 6 Fact 3.2
there is an ACC circuit Wx of size at most S(3n) with k ≤n + c log n inputs such that the variable assignment zi = W(i)
- p. 9 Section V, definition of succinct satisfying assignments
there is a circuit Wx of poly(n) size with k ≤ n+c log n inputs such that the variable assignment zi = W(i)
Judge's note: Both page images show W_x introduced and then W(i) used in the same sentence (Fact 3.2 on page 6; the definition of succinct satisfying assignments on page 9). The meaning is clear from context, so this is cosmetic.
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Typo Reference "[Gree95] F. Green. Lower bounds for depth-three circuits with equals and mod-gates." is listed but never cited in the text.
- p. 11 References
[Gree95] F. Green. Lower bounds for depth-three circuits with equals and mod-gates.
- p. 11 References
[Gree95] F. Green. Lower bounds for depth-three circuits with
Judge's note: Searched the text layer: 'Gree95' appears only in the reference list. Green's work is cited only as [GKRST95] ("Green et al." on the related-work page). The page 11 crop confirms the entry. Uncited reference.
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